347 search results - page 23 / 70 » Caching processor general registers |
MICRO
1993
IEEE
15 years 1 months ago
1993
IEEE
The conventional classification of inter-instruction dependencies (data, anti and output dependencies) provides a basic scheme for the analysis of pipeline hazards in pipelined in...
ISLPED
2006
ACM
15 years 3 months ago
2006
ACM
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to increase the instruction throughput. The high complexity and power dissipation of ...
CASES
2006
ACM
15 years 1 months ago
2006
ACM
Device scaling trends dramatically increase the susceptibility of microprocessors to soft errors. Further, mounting demand for embedded microprocessors in a wide array of safety c...
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IMA
2009
Springer
15 years 4 months ago
2009
Springer
Cache timing attacks are a class of side-channel attacks that is applicable against certain software implementations. They have generated significant interest when demonstrated ag...
RTAS
2005
IEEE
15 years 3 months ago
2005
IEEE
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...