347 search results - page 49 / 70 » Caching processor general registers |
CASES
2006
ACM
15 years 3 months ago
2006
ACM
Memory size reduction and memory accesses optimization are crucial issues for embedded systems. In the context of affine programs, these two challenges are classically tackled by ...
103
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HPCA
1998
IEEE
15 years 1 months ago
1998
IEEE
Run-time parallelization is often the only way to execute the code in parallel when data dependence information is incomplete at compile time. This situation is common in many imp...
IEEEPACT
2006
IEEE
15 years 3 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
58
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ICS
2004
Tsinghua U.
15 years 3 months ago
2004
Tsinghua U.
With processor speeds continuing to outpace the memory subsystem, cache missing memory operations continue to become increasingly important to application performance. In response...
CASES
2003
ACM
15 years 2 months ago
2003
ACM
Dynamic software optimization methods are becoming increasingly popular for improving software performance and power. The first step in dynamic optimization consists of detecting ...