347 search results - page 51 / 70 » Caching processor general registers |
JSA
2000
14 years 9 months ago
2000
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
ASPLOS
2012
ACM
13 years 5 months ago
2012
ACM
Numerous tools have been proposed to help developers fix software errors and inefficiencies. Widely-used techniques such as memory checking suffer from overheads that limit thei...
GLVLSI
2007
IEEE
15 years 4 months ago
2007
IEEE
In this paper, we propose a new design methodology to assess the risk for side-channel attacks, more specifically timing analysis and simple power analysis, at an early design st...
102
Voted
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
Pre-execution attacks cache misses for which conventional address-prediction driven prefetching is ineffective. In pre-execution, copies of cache miss computations are isolated fr...
MICRO
2005
IEEE
15 years 3 months ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...