347 search results - page 54 / 70 » Caching processor general registers |
PLDI
2011
ACM
14 years 14 days ago
2011
ACM
Information flow is an important security property that must be incorporated from the ground up, including at hardware design time, to provide a formal basis for a system’s roo...
COMPGEOM
2006
ACM
15 years 3 months ago
2006
ACM
We describe an implementation of a compact parallel algorithm for 3D Delaunay tetrahedralization on a 64-processor shared-memory machine. Our algorithm uses a concurrent version o...
LCTRTS
2009
Springer
15 years 4 months ago
2009
Springer
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
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Voted
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
PLDI
2005
ACM
15 years 3 months ago
2005
ACM
Code placement techniques have traditionally improved instruction fetch bandwidth by increasing instruction locality and decreasing the number of taken branches. However, traditio...