347 search results - page 8 / 70 » Caching processor general registers |
73
Voted
MICRO
2003
IEEE
15 years 2 months ago
2003
IEEE
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
PLDI
2003
ACM
15 years 2 months ago
2003
ACM
We compile Nova, a new language designed for writing network processing applications, using a back end based on integer-linear programming (ILP) for register allocation, optimal b...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Transient errors are one of the major reasons for system downtime in many systems. While prior research has mainly focused on the impact of transient errors on datapath, caches an...
LCTRTS
2010
Springer
15 years 2 months ago
2010
Springer
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
A distributed system is commonly modelled by a graph where nodes represent processors and there is an edge between two processors if and only if they can communicate directly. In ...