169 search results - page 18 / 34 » Caching queues in memory buffers |
129
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CAL
2010
14 years 6 months ago
2010
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
TVLSI
2008
14 years 9 months ago
2008
The traditional virtual memory system is designed for decades assuming a magnetic disk as the secondary storage. Recently, flash memory becomes a popular storage alternative for ma...
IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...
85
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DAC
2008
ACM
15 years 10 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...