169 search results - page 3 / 34 » Caching queues in memory buffers |
ISLPED
2003
ACM
13 years 11 months ago
2003
ACM
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
ISCA
2010
IEEE
13 years 11 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
TPDS
2008
13 years 6 months ago
2008
Power consumption is an important issue for cluster supercomputers as it directly affects running cost and cooling requirements. This paper investigates the memory energy efficienc...
MICRO
2008
IEEE
14 years 20 days ago
2008
IEEE
It is well recognized that LRU cache-line replacement can be ineffective for applications with large working sets or non-localized memory access patterns. Specifically, in lastle...
TVLSI
2008
13 years 6 months ago
2008
This paper proposes a high-performance scalable quality-of-service (QoS)-aware memory controller for the packet memory where packet data are stored in network routers. A major chal...