169 search results - page 7 / 34 » Caching queues in memory buffers |
105
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INFOCOM
2006
IEEE
15 years 7 months ago
2006
IEEE
— Traditionally, network buffer resources have been used at routers to queue transient packets to prevent packet drops. In contrast, we propose a scheme for large multi-hop netwo...
118
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MICRO
2003
IEEE
15 years 7 months ago
2003
IEEE
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
107
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NETWORK
2007
15 years 1 months ago
2007
— Two rate SLAs become increasingly popular in today’s Internet, allowing a customer to save money by paying one price for committed traffic and a much lower price for additio...
108
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ASAP
2006
IEEE
15 years 3 months ago
2006
IEEE
In today's embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia appl...
117
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TC
2008
15 years 1 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...