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JFR
2006
59views more  JFR 2006»
15 years 11 days ago
CajunBot: Architecture and algorithms
Arun Lakhotia, Suresh Golconda, Anthony Maida, Pab...
74
Voted
DAC
1999
ACM
15 years 4 months ago
An Approach for Extracting RT Timing Information to Annotate Algorithmic VHDL Specifications
Cordula Hansen, Francisco Nascimento, Wolfgang Ros...
91
Voted
VLSID
2006
IEEE
144views VLSI» more  VLSID 2006»
16 years 24 days ago
A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...
Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mo...