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DAC
2006
ACM
15 years 10 months ago
Criticality computation in parameterized statistical timing
Chips manufactured in 90 nm technology have shown large parametric variations, and a worsening trend is predicted. These parametric variations make circuit optimization difficult ...
Jinjun Xiong, Vladimir Zolotov, Natesan Venkateswa...
ASPLOS
2010
ACM
15 years 4 months ago
Characterizing processor thermal behavior
Temperature is a dominant factor in the performance, reliability, and leakage power consumption of modern processors. As a result, increasing numbers of researchers evaluate therm...
Francisco J. Mesa-Martinez, Ehsan K. Ardestani, Jo...
77
Voted
ICDCSW
2005
IEEE
15 years 3 months ago
Capacity Estimation of Non-Synchronous Covert Channels
Capacity estimation is an important part of covert channel analysis. It measures the severity of a covert channel by estimating the maximum information rate attainable over it. Tr...
Zhenghong Wang, Ruby B. Lee
DAC
2010
ACM
15 years 1 months ago
TSV stress aware timing analysis with applications to 3D-IC layout optimization
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee,...
MASCOTS
2008
14 years 11 months ago
Modeling Software Contention using Colored Petri Nets
Commercial servers, such as database or application servers, often attempt to improve performance via multithreading. Improper multi-threading architectures can incur contention, ...
Nilabja Roy, Akshay Dabholkar, Nathan Hamm, Lawren...