307 search results - page 46 / 62 » Calculating Architectural Reliability via Modeling and Analy... |
DAC
2003
ACM
15 years 2 months ago
2003
ACM
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
112
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TSMC
2002
14 years 9 months ago
2002
When reliable prior bounds on the acceptable errors between the data and corresponding model outputs are available, bounded-error estimation techniques make it possible to characte...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
VLSID
2008
IEEE
15 years 4 months ago
2008
IEEE
The last decade has seen a phenomenal increase in the use of electronic components in automotive systems, resulting in the replacement of purely mechanical or hydraulic-implementa...
131
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MJ
2011
14 years 4 months ago
2011
New tendencies envisage 2D/3D Multi-Processor System-On-Chip (MPSoC) as a promising solution for the consumer electronics market. MPSoCs are complex to design, as they must execute...