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TECS
2008
119views more  TECS 2008»
13 years 6 months ago
Fast exploration of bus-based communication architectures at the CCATB abstraction
straction SUDEEP PASRICHA and NIKIL DUTT University of California, Irvine and MOHAMED BEN-ROMDHANE Newport Media Inc. Currently, system-on-chip (SoC) designs are becoming increasin...
Sudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane
SAMOS
2005
Springer
13 years 11 months ago
Micro-architecture Performance Estimation by Formula
An analytical performance model for out of order issue superscalar micro-processors is presented. This model quantifies the performance impacts of micro-architecture design option...
Lucanus J. Simonson, Lei He
ESTIMEDIA
2007
Springer
14 years 13 days ago
Signature-based Microprocessor Power Modeling for Rapid System-level Design Space Exploration
This paper presents a technique for high-level power estimation of microprocessors. The technique, which is based on abstract execution profiles called ’event signatures’, op...
Peter van Stralen, Andy D. Pimentel
CODES
2006
IEEE
14 years 10 days ago
Automatic generation of transaction level models for rapid design space exploration
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate suc...
Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rain...
JCP
2008
121views more  JCP 2008»
13 years 6 months ago
Towards Design Space Exploration for Biological Systems
For both embedded systems and biological cell systems, design is a feature that defines their identity. The assembly of different components in designs of both systems can vary wid...
Simon Polstra, Tessa E. Pronk, Andy D. Pimentel, T...