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» Can Parallel Algorithms Enhance Serial Implementation
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97
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DCC
2009
IEEE
16 years 3 months ago
pFPC: A Parallel Compressor for Floating-Point Data
This paper describes and evaluates pFPC, a parallel implementation of the lossless FPC compression algorithm for 64-bit floating-point data. pFPC can trade off compression ratio f...
Martin Burtscher, Paruj Ratanaworabhan
IPPS
2003
IEEE
15 years 7 months ago
Performing DNA Comparison on a Bio-Inspired Tissue of FPGAs
String comparison is a critical issue in many application domains, including speech recognition, contents search, and bioinformatics. The similarity between two strings of lengths...
Matteo Canella, Filippo Miglioli, Alessandro Bogli...
EUROMICRO
2002
IEEE
15 years 7 months ago
Applications for the Highly Parallel Mobile Multimedia Modem M3-DSP
The Mobile Multimedia Modem (M3)-DSP is based on a scalable, highly parallel DSP platform concept capable of delivering the processing power to create software solutions for tasks...
Michael Hosemann, Gerhard Fettweis, Vladimir Nikol...
SIGMOD
2004
ACM
204views Database» more  SIGMOD 2004»
16 years 2 months ago
Buffering Database Operations for Enhanced Instruction Cache Performance
As more and more query processing work can be done in main memory, memory access is becoming a significant cost component of database operations. Recent database research has show...
Jingren Zhou, Kenneth A. Ross
132
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FGCS
2010
129views more  FGCS 2010»
15 years 29 days ago
Bulk synchronous parallel ML with exceptions
Bulk Synchronous Parallel ML is a high-level language for programming parallel algorithms. Built upon OCaml and using the BSP model, it provides a safe setting for their implementa...
Louis Gesbert, Frédéric Gava, Fr&eac...