Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, ...
Abstract. In this paper the author presents three approaches to parallel Tabu Search, applied to several instances of the Capacitated Vehicle Routing Problem with soft Time Windows...
Abstract— An efficient algorithm for three-dimensional (3D) capacitance extraction on multi-layered and lossy substrate is presented. The new algorithm represents a major improv...
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...
K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srini...
As the family of Alpha microprocessors continues to scale into more advanced technologies with very high frequency edge rates and multiple layers of interconnect, the issue of cha...