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» Capacitive Leadframe Testing
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96
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HPCA
2002
IEEE
15 years 2 months ago
Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as ...
Kevin Skadron, Tarek F. Abdelzaher, Mircea R. Stan
TCAD
2002
115views more  TCAD 2002»
14 years 9 months ago
Analytical models for crosstalk excitation and propagation in VLSI circuits
We develop a general methodology to analyze crosstalk effects that are likely to cause errors in deep submicron high speed circuits. We focus on crosstalk due to capacitive coupli...
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer
61
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ARVLSI
1995
IEEE
146views VLSI» more  ARVLSI 1995»
15 years 1 months ago
Array-of-arrays architecture for parallel floating point multiplication
This paper presents a new architecture style for the design of a parallel floating point multiplier. The proposed architecture is a synergy of trees and arrays. Architectural mod...
H. Dhanesha, K. Falakshahi, Mark Horowitz
WCE
2007
14 years 10 months ago
Information Fusion for Hazard Analysis in Multi-Sensor Systems based on Bayesian Networks
—Modern sliding table saws are equipped with several passive safety devices. However, alone in Germany several hundred severe injuries or limb amputations occur each year due dis...
Jörg Barrho, Johannes Hauger, Uwe Kiencke
DAC
2003
ACM
15 years 10 months ago
Performance-impact limited area fill synthesis
Chemical-mechanical planarization (CMP) and other manufacturing steps in very deep-submicron VLSI have varying effects on device and interconnect features, depending on the local ...
Yu Chen, Puneet Gupta, Andrew B. Kahng