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» Case study in modeling and simulation validation methodology
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IPCCC
1999
IEEE
15 years 1 months ago
Accurately modeling speculative instruction fetching in trace-driven simulation
Performance evaluation of modern, highly speculative, out-of-order microprocessors and the corresponding production of detailed, valid, accurate results have become serious challe...
R. Bhargava, L. K. John, F. Matus
APSEC
2005
IEEE
15 years 3 months ago
An Industrial Case Study on Requirements Volatility Measures
Requirements volatility is an important risk factor for software projects. Software measures can help in quantifying and predicting this risk. In this paper, we present an industr...
Annabella Loconsole, Jürgen Börstler
SOSE
2008
IEEE
15 years 4 months ago
Precise Steps for Choreography Modeling for SOA Validation and Verification
Service-oriented architecture (SOA) enables organizations to transform their existing IT infrastructure into a more flexible business process platform.. In this architecture, deco...
Sebastian Wieczorek, Andreas Roth, Alin Stefanescu...
VL
2008
IEEE
115views Visual Languages» more  VL 2008»
15 years 4 months ago
Flexible visualization of automatic simulation based on structured graph transformation
Visual modeling languages for discrete behavior modeling allow the modeler to describe how systems develop over time during system runs. Models of these languages are the basis fo...
Enrico Biermann, Claudia Ermel, Jonas Hurrelmann, ...
ISSS
2002
IEEE
148views Hardware» more  ISSS 2002»
15 years 2 months ago
A Case Study of Hardware and Software Synthesis in ForSyDe
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
Ingo Sander, Axel Jantsch, Zhonghai Lu