852 search results - page 12 / 171 » Categories, Allegories and Circuit Design |
DAC
2004
ACM
15 years 10 months ago
2004
ACM
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
101
Voted
DAC
2004
ACM
15 years 2 months ago
2004
ACM
Aggressive design cycles in the semiconductor industry demand a design-reuse principle for analog circuits. The strong impact of layout intricacies on analog circuit performance n...
86
Voted
DAC
2005
ACM
14 years 11 months ago
2005
ACM
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
136
click to vote
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
This paper presents a systematic methodology to create customized structural macromodels for a specific analog circuit. The novel contributions of the method include definition of...