852 search results - page 159 / 171 » Categories, Allegories and Circuit Design |
DAC
2006
ACM
15 years 10 months ago
2006
ACM
In this paper, we propose a new global router, BoxRouter, powered by the concept of box expansion and progressive integer linear programming (ILP). BoxRouter first uses a simple P...
67
Voted
ICCAD
2005
IEEE
15 years 6 months ago
2005
IEEE
A novel and very simple correct-by-construction top-down methodology for high-utilization mixed-size placement is presented. The PolarBear algorithm combines recursive cutsize-dri...
95
Voted
AOSD
2009
ACM
15 years 4 months ago
2009
ACM
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
79
Voted
ISPD
2006
ACM
15 years 3 months ago
2006
ACM
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
SBCCI
2005
ACM
15 years 3 months ago
2005
ACM
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...