Integrated circuits with bounded lifetimes can have many business advantages. We give some simple examples of m ods to enforce tunable expiration dates for chips using nanom reliab...
A methodology is proposed for designing robust circuits exhibiting higher tolerance to process and environmental variations. This higher tolerance is achieved by exploiting the in...
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
This paper first presents an accurate and efficient method of estimating the short circuit energy dissipation and the output transition time of CMOS buffers. Next the paper descri...