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DAC
2004
ACM
16 years 21 days ago
Post-layout logic optimization of domino circuits
Logic duplication, a commonly used synthesis technique to remove trapped inverters in reconvergent paths of Domino circuits, incurs high area and power penalties. In this paper, w...
Aiqun Cao, Cheng-Kok Koh
98
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DAC
2005
ACM
15 years 1 months ago
A combined feasibility and performance macromodel for analog circuits
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
Mengmeng Ding, Ranga Vemuri
HOTNETS
2010
14 years 6 months ago
Proteus: a topology malleable data center network
Full-bandwidth connectivity between all servers of a data center may be necessary for all-to-all traffic patterns, but such interconnects suffer from high cost, complexity, and en...
Ankit Singla, Atul Singh, Kishore Ramachandran, Le...
FPGA
2011
ACM
321views FPGA» more  FPGA 2011»
14 years 3 months ago
An analytical model relating FPGA architecture parameters to routability
We present an analytical model relating FPGA architectural parameters to the routability of the FPGA. The inputs to the model include the channel width and connection and switch b...
Joydip Das, Steven J. E. Wilton
FPGA
2010
ACM
182views FPGA» more  FPGA 2010»
14 years 9 months ago
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
Doris Chen, Deshanand Singh, Jeffrey Chromczak, Da...