852 search results - page 48 / 171 » Categories, Allegories and Circuit Design |
DAC
2007
ACM
16 years 25 days ago
2007
ACM
Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability challenges in nano-scale technology. This paper presents an efficient technique to characte...
130
click to vote
ISPD
2012
ACM
13 years 7 months ago
2012
ACM
Importance sampling is a popular approach to estimate rare event failures of SRAM cells. We propose to improve importance sampling by probability collectives. First, we use “Kul...
DAC
2006
ACM
16 years 24 days ago
2006
ACM
In this paper we present a new efficient algorithm for retiming sequential circuits with edge-triggered registers under both setup and hold constraints. Compared with the previous...
102
click to vote
GLVLSI
2008
IEEE
15 years 6 months ago
2008
IEEE
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
A probabilistic power estimation technique for combinational circuits is presented. A novel set of simple waveforms is the kernel of this technique. The transition density of each...