852 search results - page 59 / 171 » Categories, Allegories and Circuit Design |
DAC
2009
ACM
16 years 25 days ago
2009
ACM
Semiconductor design companies are in a continuous search for design tools that address the ever increasing chip design complexity coupled with strict time-to-market schedules and...
DAC
2005
ACM
15 years 1 months ago
2005
ACM
Traditional corner analysis fails to guarantee a target yield for a given performance metric. However, recently proposed solutions, in the form of statistical timing analysis, whi...
107
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DAC
2003
ACM
16 years 24 days ago
2003
ACM
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
GLVLSI
2010
IEEE
15 years 5 months ago
2010
IEEE
Processors have traditionally been designed for the worst-case, resulting in designs that have high yields, but are expensive in terms of area and power. Better-than-worst-case (B...
112
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CASES
2011
ACM
13 years 11 months ago
2011
ACM
Escalating variations in modern CMOS designs have become a threat to Moore’s law. While previous works have proposed techniques for tolerating variations by trading reliability ...