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DAC
2011
ACM
13 years 11 months ago
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
In this work, we propose an efficient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Ky...
DAC
2012
ACM
13 years 2 months ago
Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs
In this work, we propose a fast and accurate chip/package thermomechanical stress and reliability co-analysis tool for TSV-based 3D ICs. We also present a design optimization meth...
Moongon Jung, David Z. Pan, Sung Kyu Lim
DAC
2005
ACM
16 years 24 days ago
Operator-based model-order reduction of linear periodically time-varying systems
eriodically time-varying (LPTV) abstractions are useful for a variety of communication and computer subsystems. In this paper, we present a novel operator-based model-order reduct...
Yayun Wan, Jaijeet S. Roychowdhury
GLVLSI
2009
IEEE
112views VLSI» more  GLVLSI 2009»
15 years 6 months ago
Simultaneous shield and repeater insertion
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
Renatas Jakushokas, Eby G. Friedman
ISPD
2006
ACM
103views Hardware» more  ISPD 2006»
15 years 5 months ago
High accurate pattern based precondition method for extremely large power/ground grid analysis
In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-...
Jin Shi, Yici Cai, Sheldon X.-D. Tan, Xianlong Hon...