This paper presents the Collapsed Bennett Layout, a general purpose floorplan for reversible quantum-dot cellular automata (QCA) circuits. In order to exploit the full density and...
Sarah E. Murphy, Erik DeBenedictis, Peter M. Kogge
With the continuous increase of circuit density, interconnect length, and aspect ratio, the influence of capacitive and inductive coupling on timing characteristics of integrated ...
Power grid verification in modern integrated circuits is an integral part of early system design where adjustments can be most easily incorporated. In this work, we describe an ea...
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
We present an efficient search strategy for satisfiability checking on circuits represented at the register-transfer-level (RTL). We use the RTL circuit structure by extending con...
Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting...