852 search results - page 70 / 171 » Categories, Allegories and Circuit Design |
104
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DAC
2005
ACM
15 years 1 months ago
2005
ACM
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
108
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ISLPED
2005
ACM
15 years 5 months ago
2005
ACM
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
103
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GLVLSI
2008
IEEE
15 years 6 months ago
2008
IEEE
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
110
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ISLPED
2007
ACM
15 years 1 months ago
2007
ACM
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
DAC
2009
ACM
15 years 6 months ago
2009
ACM
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verifica...