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ISCA
2010
IEEE
314views Hardware» more  ISCA 2010»
15 years 2 months ago
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay...
JUCS
2006
104views more  JUCS 2006»
14 years 9 months ago
Multi-Objective Evolutionary Algorithms and Pattern Search Methods for Circuit Design Problems
: The paper concerns the design of evolutionary algorithms and pattern search methods on two circuit design problems: the multi-objective optimization of an Operational Transconduc...
Tonio Biondi, Angelo Ciccazzo, Vincenzo Cutello, S...
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 6 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
CF
2008
ACM
14 years 11 months ago
Exact combinational logic synthesis and non-standard circuit design
Using a new exact synthesizer that automatically induces minimal universal boolean function libraries, we introduce two indicators for comparing their expressiveness: the first ba...
Paul Tarau, Brenda Luderman
ISLPED
2007
ACM
92views Hardware» more  ISLPED 2007»
14 years 11 months ago
Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI
Negative bias temperature instability (NBTI) has become a dominant reliability concern for nanoscale PMOS transistors. In this paper, we propose variable-latency adder (VL-adder) ...
Yiran Chen, Hai Li, Jing Li, Cheng-Kok Koh