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DAC
2007
ACM
16 years 27 days ago
Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
Ümit Y. Ogras, Diana Marculescu, Puru Choudha...
DAC
2010
ACM
14 years 10 months ago
MFTI: matrix-format tangential interpolation for modeling multi-port systems
Numerous algorithms to macromodel a linear time-invariant (LTI) system from its frequency-domain sampling data have been proposed in recent years [1, 2, 3, 4, 5, 6, 7, 8], among w...
Yuanzhe Wang, Chi-Un Lei, Grantham K. H. Pang, Nga...
DAC
2002
ACM
16 years 26 days ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
86
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DAC
2009
ACM
16 years 27 days ago
Event-driven gate-level simulation with GP-GPUs
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
Debapriya Chatterjee, Andrew DeOrio, Valeria Berta...
ISSS
2002
IEEE
148views Hardware» more  ISSS 2002»
15 years 4 months ago
A Case Study of Hardware and Software Synthesis in ForSyDe
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
Ingo Sander, Axel Jantsch, Zhonghai Lu