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» Cell Broadband Engine processor: Design and implementation
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MSE
2005
IEEE
133views Hardware» more  MSE 2005»
15 years 7 months ago
Embedded System Design with FPGAs Using HDLs (Lessons Learned and Pitfalls to Be Avoided)
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate students at WPI and to engineers through various short co...
R. James Duckworth
ARCS
2009
Springer
15 years 8 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
FPL
2005
Springer
114views Hardware» more  FPL 2005»
15 years 7 months ago
Measuring and Utilizing the Correlation Between Signal Connectivity and Signal Positioning for FPGAs Containing Multi-Bit Buildi
As the logic capacity of FPGA increases, there has been a corresponding increase in the variety of FPGA building blocks. From a mere collection of the conventional logic blocks, F...
Andy Gean Ye, Jonathan Rose
EUROSYS
2010
ACM
15 years 10 months ago
Reverse Engineering of Binary Device Drivers with RevNIC
This paper presents a technique that helps automate the reverse engineering of device drivers. It takes a closed-source binary driver, automatically reverse engineers the driverâ€...
Vitaly Chipounov, George Candea
CODES
2006
IEEE
15 years 7 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...