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ISPD
1998
ACM
128views Hardware» more  ISPD 1998»
15 years 3 months ago
Topology constrained rectilinear block packing for layout reuse
In this paper, we formulate the problem of topology constrained rectilinear block packing in layout reuse. A speci c class of rectilinear shaped blocks, ordered convex rectilinear...
Maggie Zhiwei Kang, Wayne Wei-Ming Dai
DATE
2003
IEEE
124views Hardware» more  DATE 2003»
15 years 4 months ago
A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs
: Over the years, many design methodologies/tools and layout architectures have been developed for datapath-oriented designs. One commonly used approach for high-speed datapath des...
Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, Ting...
91
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VLDB
2007
ACM
121views Database» more  VLDB 2007»
15 years 5 months ago
CellSort: High Performance Sorting on the Cell Processor
In this paper we describe the design and implementation of CellSort − a high performance distributed sort algorithm for the Cell processor. We design CellSort as a distributed b...
Bugra Gedik, Rajesh Bordawekar, Philip S. Yu
ISBI
2009
IEEE
15 years 6 months ago
Energy Minimization Methods for Cell Motion Correction and Intracellular Analysis in Live-Cell Fluorescence Microscopy
The ultimate aim of many live-cell fluorescence microscopy imaging experiments is the quantitative analysis of the spatial structure and temporal behavior of intracellular object...
Oleh Dzyubachyk, Wiggert A. van Cappellen, Jeroen ...
DATE
2005
IEEE
169views Hardware» more  DATE 2005»
15 years 4 months ago
Activity Packing in FPGAs for Leakage Power Reduction
In this paper, two packing algorithms for the detection of activity profiles in MTCMOS-based FPGA structures are proposed for leakage power mitigation. The first algorithm is a ...
Hassan Hassan, Mohab Anis, Antoine El Daher, Moham...