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DATE
2006
IEEE
96views Hardware» more  DATE 2006»
15 years 5 months ago
A methodology for FPGA to structured-ASIC synthesis and verification
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...
Michael Hutton, Richard Yuan, Jay Schleicher, Greg...
FSTTCS
2001
Springer
15 years 3 months ago
Computability and Complexity Results for a Spatial Assertion Language for Data Structures
Abstract. This paper studies a recently developed an approach to reasoning about mutable data structures, which uses an assertion language with spatial conjunction and implication ...
Cristiano Calcagno, Hongseok Yang, Peter W. O'Hear...
BIOCOMP
2006
15 years 21 days ago
Dynamic Bayesian Network (DBN) with Structure Expectation Maximization (SEM) for Modeling of Gene Network from Time Series Gene
Exploring gene regulatory network is a key topic in molecular biology. In this paper, we present a new dynamic Bayesian network (DBN) framework embedded with structural expectatio...
Yu Zhang, Zhidong Deng, Hongshan Jiang, Peifa Jia
BMCBI
2004
116views more  BMCBI 2004»
14 years 11 months ago
Evaluation of the suitability of free-energy minimization using nearest-neighbor energy parameters for RNA secondary structure p
Background: A detailed understanding of an RNA's correct secondary and tertiary structure is crucial to understanding its function and mechanism in the cell. Free energy mini...
Kishore J. Doshi, Jamie J. Cannone, Christian W. C...
VIS
2003
IEEE
116views Visualization» more  VIS 2003»
16 years 15 days ago
Space Efficient Fast Isosurface Extraction for Large Datasets
In this paper, we present a space efficient algorithm for speeding up isosurface extraction. Even though there exist algorithms that can achieve optimal search performance to iden...
Udeepta Bordoloi, Han-Wei Shen