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INFOCOM
2010
IEEE
14 years 8 months ago
DPLC: Dynamic Packet Length Control in Wireless Sensor Networks
—Previous packet length optimizations for sensor networks often employ a fixed optimal length scheme, while in this study we present DPLC, a Dynamic Packet Length Control scheme...
Wei Dong, Xue Liu, Chun Chen, Yuan He, Gong Chen, ...
DSD
2003
IEEE
138views Hardware» more  DSD 2003»
15 years 3 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
14 years 11 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...
ADHOC
2010
97views more  ADHOC 2010»
14 years 10 months ago
Modeling and analysis of two-flow interactions in wireless networks
Abstract--Interference plays a complex and often defining role in the performance of wireless networks, especially in multi-hop scenarios. In the presence of interference, Carrier ...
Saquib Razak, Vinay Kolar, Nael B. Abu-Ghazaleh
GRID
2006
Springer
14 years 9 months ago
YA: Fast and Scalable Discovery of Idle CPUs in a P2P network
Discovery of large amounts of idle CPUs in fully distributed and shared Grid systems is needed in relevant applications and is still a challenging problem. In this paper we present...
Javier Celaya, Unai Arronategui