Sciweavers

850 search results - page 70 / 170
» Certification of System Architecture Dependability
Sort
View
IPPS
1999
IEEE
15 years 4 months ago
Non-Preemptive Scheduling of Real-Time Threads on Multi-Level-Context Architectures
The rapid progress in high-performance microprocessor design has made it di cult to adapt real-time scheduling results to new models of microprocessor hardware, thus leaving an un...
Jan Jonsson, Henrik Lönn, Kang G. Shin
ATAL
2003
Springer
15 years 5 months ago
MONAD: a flexible architecture for multi-agent control
Research in multi-agent systems has led to the development of many multi-agent control architectures. However, we believe that there is currently no known optimal structure for mu...
Thuc Vu, Jared Go, Gal A. Kaminka, Manuela M. Velo...
CASES
2011
ACM
13 years 12 months ago
Architecting processors to allow voltage/reliability tradeoffs
Escalating variations in modern CMOS designs have become a threat to Moore’s law. While previous works have proposed techniques for tolerating variations by trading reliability ...
John Sartori, Rakesh Kumar
SIGSOFT
2008
ACM
16 years 18 days ago
Explicit exception handling variability in component-based product line architectures
Separation of concerns is one of the overarching goals of exception handling in order to keep separate normal and exceptional behaviour of a software system. In the context of a s...
Ivo Augusto Bertoncello, Marcelo Oliveira Dias, Pa...
EDCC
2008
Springer
15 years 1 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...