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» Challenges for Constraint Programming in Networking
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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
14 years 10 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
CC
2011
Springer
270views System Software» more  CC 2011»
14 years 4 months ago
Subregion Analysis and Bounds Check Elimination for High Level Arrays
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar
WORDS
2003
IEEE
15 years 5 months ago
ORB Middleware Evolution for Networked Embedded Systems
Standards-based COTS middleware has been shown to be effective in meeting a range of functional and QoS requirements for distributed real-time and embedded (DRE) systems. Each sta...
Christopher D. Gill, Venkita Subramonian, Jeff Par...
WSC
2008
15 years 2 months ago
Priority mix planning for cycle time-differentiated semiconductor manufacturing services
Semiconductor fabs often offer manufacturing service of multiple priorities in terms of cycle time-based X-factor targets (XFTs) and fab production must be planned accordingly. Th...
Shi-Chung Chang, Shin-Shyu Su, Ke-Ju Chen
113
Voted
CCS
2010
ACM
15 years 22 days ago
Input generation via decomposition and re-stitching: finding bugs in Malware
Attackers often take advantage of vulnerabilities in benign software, and the authors of benign software must search their code for bugs in hopes of finding vulnerabilities before...
Juan Caballero, Pongsin Poosankam, Stephen McCaman...