Sciweavers

170 search results - page 17 / 34
» Challenges in Embedded Memory Design and Test
Sort
View
127
Voted
DAC
2003
ACM
16 years 4 months ago
A scalable software-based self-test methodology for programmable processors
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...
Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit D...
127
Voted
HOST
2009
IEEE
15 years 1 months ago
Experiences in Hardware Trojan Design and Implementation
Abstract-- We report our experiences in designing and implementing several hardware Trojans within the framework of the Embedded System Challenge competition that was held as part ...
Yier Jin, Nathan Kupp, Yiorgos Makris
119
Voted
DAC
2009
ACM
15 years 10 months ago
Information hiding for trusted system design
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verifica...
Junjun Gu, Gang Qu, Qiang Zhou
119
Voted
ASPLOS
2011
ACM
14 years 7 months ago
Mnemosyne: lightweight persistent memory
New storage-class memory (SCM) technologies, such as phasechange memory, STT-RAM, and memristors, promise user-level access to non-volatile storage through regular memory instruct...
Haris Volos, Andres Jaan Tack, Michael M. Swift
131
Voted
IPSN
2007
Springer
15 years 9 months ago
Harbor: software-based memory protection for sensor nodes
Many sensor nodes contain resource constrained microcontrollers where user level applications, operating system components, and device drivers share a single address space with no...
Ram Kumar, Eddie Kohler, Mani B. Srivastava