4208 search results - page 95 / 842 » Challenges in Evaluating Distributed Algorithms |
ISPA
2007
Springer
15 years 4 months ago
2007
Springer
The Cell processor is a typical example of a heterogeneous multiprocessor-on-chip architecture that uses several levels of parallelism to deliver high performance. Closing the gap ...
IEEEPACT
2009
IEEE
14 years 7 months ago
2009
IEEE
Efficiently using the hardware capabilities of the Cell processor, a heterogeneous chip multiprocessor that uses several levels of parallelism to deliver high performance, and bei...
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TREC
2001
14 years 11 months ago
2001
The TREC-2001 Web track evaluation experiments at the Justsystem site are described with a focus on the "aboutness" based approach in text retrieval. In the web ad hoc t...
ICPPW
1999
IEEE
15 years 2 months ago
1999
IEEE
A new method for updating certificate revocation trees (CRT) is proposed. Efficient revocation of publickey certificates is a current issue in public-key Infrastructure because a ...
SIGMETRICS
2006
ACM
15 years 3 months ago
2006
ACM
A major challenge in the design of wireless networks is the need for distributed scheduling algorithms that will efficiently share the common spectrum. Recently, a few distributed...