Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
Abstract— In this paper we present a case study of cooperation of a strongly heterogeneous robot team, composed of a highly articulated humanoid robot and a wheeled robot with la...
Transient faults due to particle strikes are a key challenge in microprocessor design. Driven by exponentially increasing transistor counts, per-chip faults are a growing burden. ...
Kristen R. Walcott, Greg Humphreys, Sudhanva Gurum...
It is challenging to manage the performance of real-time databases (RTDBs) that are often used in data-intensive real-time applications such as agile manufacturing and target trac...