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159
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CODES
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper presents an RTOS-centric hardwareisoftware cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is tha...
214
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CODES
2004
IEEE
15 years 10 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
139
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CODES
2004
IEEE
15 years 10 months ago
2004
IEEE
We present a analytical framework to identify the tradeoffs and performance impacts associated with different SoC platform configurations in the specific context of implementing m...
177
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CODES
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
177
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CODES
2004
IEEE
15 years 10 months ago
2004
IEEE
Prior work on TLB power optimization considered circuit and architectural techniques. A recent software-based technique for data TLBs has considered the possibility of storing the...