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CGO
2010
IEEE
15 years 10 months ago
Automatic creation of tile size selection models
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sa...
CGO
2010
IEEE
15 years 10 months ago
Exploiting statistical correlations for proactive prediction of program behaviors
This paper presents a finding and a technique on program behavior prediction. The finding is that surprisingly strong statistical correlations exist among the behaviors of diffe...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Feng Mao, ...
CGO
2010
IEEE
15 years 10 months ago
Level by level: making flow- and context-sensitive pointer analysis scalable for millions of lines of code
We present a practical and scalable method for flow- and contextsensitive (FSCS) pointer analysis for C programs. Our method analyzes the pointers in a program level by level in ...
Hongtao Yu, Jingling Xue, Wei Huo, Xiaobing Feng 0...
CISIS
2010
IEEE
15 years 10 months ago
Threaded Dynamic Memory Management in Many-Core Processors
—Current trends in desktop processor design have been toward many-core solutions with increased parallelism. As the number of supported threads grows in these processors, it may ...
Edward C. Herrmann, Philip A. Wilsey
ISPASS
2010
IEEE
15 years 10 months ago
Cache contention and application performance prediction for multi-core systems
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
Chi Xu, Xi Chen, Robert P. Dick, Zhuoqing Morley M...
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