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115
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ISCA
2011
IEEE
14 years 1 months ago
2011
IEEE
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
110
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ISCA
2011
IEEE
14 years 1 months ago
2011
IEEE
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
101
Voted
ISCA
2011
IEEE
2011
IEEE
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
14 years 1 months ago
To meet the demand for more powerful high-performance shared-memory servers, multiprocessor systems must incorporate efficient and scalable cache coherence protocols, such as thos...
121
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ISCA
2011
IEEE
14 years 1 months ago
2011
IEEE
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
WIOPT
2011
IEEE
14 years 1 months ago
2011
IEEE
—In this paper, we address the spectrum portfolio optimization (SPO) question in the context of secondary spectrum markets, where bandwidth (spectrum access rights) can be bought...