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SYSTOR
2009
ACM
15 years 10 months ago
DHIS: discriminating hierarchical storage
A typical storage hierarchy comprises of components with varying performance and cost characteristics, providing multiple options for data placement. We propose and evaluate a hie...
Chaitanya Yalamanchili, Kiron Vijayasankar, Erez Z...
140
Voted
PIMRC
2008
IEEE
15 years 10 months ago
Understanding the Performance of 802.11 Networks
Abstract—In this paper, we review the most important performance characteristics of the 802.11 DCF wireless networks, point out some false common knowledge, and report on recent ...
Andrzej Duda
DATE
2007
IEEE
173views Hardware» more  DATE 2007»
15 years 10 months ago
Architectural leakage-aware management of partitioned scratchpad memories
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
Olga Golubeva, Mirko Loghi, Massimo Poncino, Enric...
INFOCOM
2007
IEEE
15 years 10 months ago
Optimal Jamming Attacks and Network Defense Policies in Wireless Sensor Networks
Abstract— We consider a scenario where a sophisticated jammer jams an area in a single-channel wireless sensor network. The jammer controls the probability of jamming and transmi...
Mingyan Li, Iordanis Koutsopoulos, Radha Poovendra...
138
Voted
FCCM
2006
IEEE
125views VLSI» more  FCCM 2006»
15 years 10 months ago
A Multithreaded Soft Processor for SoPC Area Reduction
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
Blair Fort, Davor Capalija, Zvonko G. Vranesic, St...