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ISPASS
2009
IEEE
15 years 4 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
ISCAS
2007
IEEE
141views Hardware» more  ISCAS 2007»
15 years 3 months ago
Analog Emulation of a Reconfigurable Tap Changing Transformer
—Accurate analog models of power system components are required in order to realize an analog computation engine for power systems. Analog computation is an area of continued int...
Aaron St. Leger, Juan C. Jimenez, Agung Fu, Sanal ...
WSC
2007
14 years 11 months ago
A trace-based visual inspection technique to detect errors in simulation models
Generation of traces from a simulation model and their analysis is a powerful and common mean to debug simulation models. In this paper, we define a measure of progress for simul...
Peter Kemper
WSC
2000
14 years 10 months ago
Java engine for UML based hybrid state machines
One of the approaches to modeling hybrid systems is to assign algebraic-differential equations describing the continuous behavior to states of state machines that represent discre...
Andrei Borshchev, Yuri B. Kolesov, Yuri B. Seniche...
IJCNN
2007
IEEE
15 years 3 months ago
FEBAM: A Feature-Extracting Bidirectional Associative Memory
—In this paper, a new model that can ultimately create its own set of perceptual features is proposed. Using a bidirectional associative memory (BAM)-inspired architecture, the r...
Sylvain Chartier, Gyslain Giguère, Patrice ...