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HIPEAC
2011
Springer
14 years 4 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
132
Voted
HYBRID
2004
Springer
15 years 10 months ago
Network Congestion Alleviation Using Adjoint Hybrid Control: Application to Highways
Abstract. This paper derives an optimization-based control methodology for networks of switched and hybrid systems in which each mode is governed by a partial differential equatio...
Alexandre M. Bayen, Robin L. Raffard, Claire Tomli...
156
Voted
SODA
2012
ACM
212views Algorithms» more  SODA 2012»
13 years 7 months ago
Parallelism and time in hierarchical self-assembly
We study the role that parallelism plays in time complexariants of Winfree’s abstract Tile Assembly Model (aTAM), a model of molecular algorithmic self-assembly. In the “hiera...
Ho-Lin Chen, David Doty
SOSP
2003
ACM
16 years 1 months ago
Capriccio: scalable threads for internet services
This paper presents Capriccio, a scalable thread package for use with high-concurrency servers. While recent work has advocated event-based systems, we believe that threadbased sy...
J. Robert von Behren, Jeremy Condit, Feng Zhou, Ge...
158
Voted
CD
2005
Springer
15 years 10 months ago
Modelling Deployment Using Feature Descriptions and State Models for Component-Based Software Product Families
Abstract. Products within a product family are composed of different component configurations where components have different variable features and a large amount of dependency re...
Slinger Jansen, Sjaak Brinkkemper