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VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
15 years 10 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
ICCD
2002
IEEE
228views Hardware» more  ICCD 2002»
15 years 6 months ago
JMA: The Java-Multithreading Architecture for Embedded Processors
Embedded processors are increasingly deployed in applications requiring high performance with good real-time characteristics whilst being low power. Parallelism has to be extracte...
Panit Watcharawitch, Simon W. Moore
TJS
2002
160views more  TJS 2002»
14 years 9 months ago
Adaptive Optimizing Compilers for the 21st Century
Historically, compilers have operated by applying a fixed set of optimizations in a predetermined order. We call such an ordered list of optimizations a compilation sequence. This...
Keith D. Cooper, Devika Subramanian, Linda Torczon
POPL
2003
ACM
15 years 10 months ago
Bitwidth aware global register allocation
Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is assigned a r...
Sriraman Tallam, Rajiv Gupta
ASPDAC
2007
ACM
130views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Configurable Multi-Processor Platforms for Next Generation Embedded Systems
- Next-generation embedded systems in application domains such as multimedia, wired and wireless communications, and multipurpose portable devices, are increasingly turning to mult...
David Goodwin, Chris Rowen, Grant Martin