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IPPS
2006
IEEE
15 years 7 months ago
Selection of instruction set extensions for an FPGA embedded processor core
A design process is presented for the selection of a set of instruction set extensions for the PowerPC 405 processor that is embedded into the Xilinx Virtex Family of FPGAs. The i...
Brian F. Veale, John K. Antonio, Monte P. Tull, S....
SAC
2006
ACM
15 years 7 months ago
Preliminary performance evaluation of an adaptive dynamic extensible processor for embedded applications
In this research we investigate an approach for adaptive dynamic instruction set extension, tuning processors to specific applications after fabrication. Categories and Subject De...
Hamid Noori, Kazuaki Murakami
VLSID
2006
IEEE
119views VLSI» more  VLSID 2006»
16 years 1 months ago
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
CASES
2006
ACM
15 years 7 months ago
Code transformation strategies for extensible embedded processors
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. I...
Paolo Bonzini, Laura Pozzi
SBCCI
2006
ACM
200views VLSI» more  SBCCI 2006»
15 years 7 months ago
REDEFIS: a system with a redefinable instruction set processor
The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight perform...
Victor M. Goulart Ferreira, Lovic Gauthier, Takayu...