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» Characterizing the branch misprediction penalty
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ISCA
1998
IEEE
124views Hardware» more  ISCA 1998»
13 years 10 months ago
Threaded Multiple Path Execution
This paper presents Threaded Multi-Path Execution (TME), which exploits existing hardware on a Simultaneous Multithreading (SMT) processor to speculatively execute multiple paths ...
Steven Wallace, Brad Calder, Dean M. Tullsen
TC
2008
13 years 6 months ago
On-Demand Solution to Minimize I-Cache Leakage Energy with Maintaining Performance
This paper describes a new on-demand wake-up prediction policy for reducing leakage power. The key insight is that branch prediction can be used to selectively wake up only the nee...
Sung Woo Chung, Kevin Skadron
MICRO
1999
IEEE
98views Hardware» more  MICRO 1999»
13 years 10 months ago
Instruction Fetch Mechanisms for Multipath Execution Processors
Branch mispredictions can have a major performance impact on high-performance processors. Multipath execution has recently been introduced to help limit the misprediction penaltie...
Artur Klauser, Dirk Grunwald
DAMON
2007
Springer
14 years 17 days ago
Architectural characterization of XQuery workloads on modern processors
As XQuery rapidly emerges as the standard for querying XML documents, it is very important to understand the architectural characteristics and behaviors of such workloads. A lot o...
Rubao Lee, Bihui Duan, Taoying Liu
ICCD
2002
IEEE
130views Hardware» more  ICCD 2002»
14 years 3 months ago
Branch Behavior of a Commercial OLTP Workload on Intel IA32 Processors
This paper presents a detailed branch characterization of an Oracle based commercial on-line transaction processing workload, Oracle Database Benchmark (ODB), running on an IA32 p...
Murali Annavaram, Trung A. Diep, John Paul Shen