Sciweavers

12 search results - page 3 / 3
» Checking Array Bound Violation Using Segmentation Hardware
Sort
View
149
Voted
PEPM
2009
ACM
16 years 9 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
98
Voted
SIGSOFT
2003
ACM
15 years 10 months ago
ARCHER: using symbolic, path-sensitive analysis to detect memory access errors
Memory corruption errors lead to non-deterministic, elusive crashes. This paper describes ARCHER (ARray CHeckER) a static, effective memory access checker. ARCHER uses path-sensit...
Yichen Xie, Andy Chou, Dawson R. Engler