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QCQC
1998
Springer
154views Communications» more  QCQC 1998»
15 years 2 months ago
Automated Design of Quantum Circuits
In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in ...
Colin P. Williams, Alexander G. Gray
GECCO
2003
Springer
103views Optimization» more  GECCO 2003»
15 years 3 months ago
Evaluation of Parameter Sensitivity for Portable Embedded Systems through Evolutionary Techniques
Power consumption and portability issues are becoming increasingly significant in embedded system architectures. Therefore, it is important that chip architects and integrated circ...
James Northern III, Michael A. Shanblatt
ICES
2003
Springer
151views Hardware» more  ICES 2003»
15 years 3 months ago
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath
This paper presents a methodology to design optimized electronic systems from high abstraction level descriptions. The methodology uses Genetic Programming in addition to high-leve...
Sérgio G. Araújo, Antônio C. M...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
15 years 2 months ago
FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
PPSN
2004
Springer
15 years 3 months ago
Evolving Genetic Regulatory Networks for Hardware Fault Tolerance
We present a new approach that is able to produce an increased fault tolerance in bio-inspired electronic circuits. To this end, we designed hardwarefriendly genetic regulatory net...
Arne Koopman, Daniel Roggen