366 search results - page 14 / 74 » Circuit optimization using statistical static timing analysi... |
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ICCD
2008
IEEE
15 years 8 months ago
2008
IEEE
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
ISOLA
2004
Springer
15 years 5 months ago
2004
Springer
Methods for Worst-Case Execution Time (WCET) analysis have been known for some time, and recently commercial tools have emerged. However, the technique has so far not been much use...
ASPDAC
2010
ACM
14 years 9 months ago
2010
ACM
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
FPGA
2007
ACM
15 years 5 months ago
2007
ACM
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...
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GLVLSI
2010
IEEE
15 years 1 months ago
2010
IEEE
In this paper, we present an approved linear-time algorithm for statistical leakage analysis in the present of any spatial correlation condition (strong or weak). The new algorith...