366 search results - page 23 / 74 » Circuit optimization using statistical static timing analysi... |
ISQED
2007
IEEE
15 years 6 months ago
2007
IEEE
We propose gate level statistical simulation to bridge the gap between the most accurate Monte Carlo SPICE simulation and the most efficient circuit level statistical static timi...
ITC
2003
IEEE
15 years 5 months ago
2003
IEEE
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...
ECRTS
1998
IEEE
15 years 4 months ago
1998
IEEE
In this paper we present co-transformation, a novel approach to the mapping of execution information from the source code of a program to the object code for the purpose of worst-...
ICCAD
1997
IEEE
15 years 4 months ago
1997
IEEE
The circuit tuning problem is best approached by means of gradient-based nonlinear optimization algorithms. For large circuits, gradient computation can be the bottleneck in the o...
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SAS
2005
Springer
15 years 5 months ago
2005
Springer
Abstract. We present our experience of combining, in a realistic setting, a static analyzer with a statistical analysis. This combination is in order to reduce the inevitable false...