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CODES
2008
IEEE
15 years 6 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra
CVPR
2005
IEEE
16 years 1 months ago
Robust and Efficient Foreground Analysis for Real-Time Video Surveillance
We present a new method to robustly and efficiently analyze foreground when we detect background for a fixed camera view by using mixture of Gaussians models and multiple cues. Th...
Ying-li Tian, Max Lu, Arun Hampapur
75
Voted
GECCO
2000
Springer
101views Optimization» more  GECCO 2000»
15 years 3 months ago
Polynomial Time Summary Statistics for Two general Classes of Functions
In previous work we showed, by Walsh analysis, that summary statistics such as mean, variance, skew, and higher order statistics can be computed in polynomial time for embedded la...
Robert B. Heckendorn
DAC
2010
ACM
15 years 3 months ago
TSV stress aware timing analysis with applications to 3D-IC layout optimization
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee,...
100
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IPPS
2005
IEEE
15 years 5 months ago
Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores
The use of pipelined floating-point arithmetic cores to create high-performance FPGA-based computational kernels has introduced a new class of problems that do not exist when usi...
Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna